Control and Data plane
From CT3
Routers (also known as layer-3 switches) perform two basic functions:
- Forward packets between interfaces (layer-3 switching).
- Exchange reachability information between routers (routing).
Switching (packet forwarding) is performed in the data (forwarding) plane. Routing (exchange of routing information) is performed in the control plane. The information collected with routing protocols (for example, ) is used to build topology databases (also known as link state databases or routing databases depending on the terminology of the routing protocol). The routing protocols extract best paths from the protocol-specific data structures and insert them in the routing table. The routing table might contain recursive information and is thus not suitable for fast packet forwarding. The routers use two mechanisms to speed up packet forwarding:
- They can cache the results of routing table lookup for recently used destinations (fast switching in Cisco IOS terminology).
- They can pre-compute the actual forwarding data for every destination and store them in the forwarding table that can be directly used by the data plane.
Figure 1 illustrates the relationships between the control and the data planes.
Processing of inbound packets
In most router implementations, the data plane receives and processes all inbound packets and selective forwards packets destined for the router (for example, routing protocol updates) or packets that need special processing (for example, IP datagrams with IP options or IP datagrams that have exceeded their TTL) to the control plane.
The control plane might pass outbound packets to the data plane or use its own forwarding mechanisms to determine the outgoing interface and the next-hop router (for example, when using the local policy routing).
Figure 2 shows typical packet flow in a router.
Common architectures
In devices with distributed (multiple CPU) architecture, the central CPU implements the control plane (most routing protocols are designed to operate on a single control plane node), while the CPUs on linecards implement distributed high-speed data plane.
High-speed layer-3 switches commonly implement data plane with special hardware (for example, Ternary Content Addressable Memory; TCAM).
Single-CPU devices that perform layer-3 switching in software usually implement the data plane in the interrupt code (high-priority process-independent code in the kernel of the operating system) to minimize the overhead associated with forwarding of individual packet. For example, Cisco IOS implements the Cisco Express Forwarding (CEF) and the fast switching in the interrupt code.


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